HLDVT 2008 - Call for Papers

CALL FOR PAPERS

Workshop Scope -- Submissions -- Committees

Workshop Scope

HLDVT 2008 is the thirteenth in a series of annual workshops designed to bring together a community of researchers in the areas of design, validation, and test. The workshop revolves around a common theme of addressing the integration of multiple functions on-chip at higher levels of design abstraction, and the techniques and methodologies for modeling, analyzing, and validating such systems. In particular, the workshop has become a unique forum in recent years for researchers and practitioners to discuss the practical issues associated with simulation and validation of extremely large designs. Topics of interest include:

Simulation-Based Validation
Formal Verification
Design Abstraction & Behavioral Modeling
Error Trace Interpretation & Debugging
Hybrid SAT/BDD/ATPG Methods
On-Chip and Core-Based Testing
Test Generation for Defects, Design Errors, and Delay
Design/Synthesis for Test
Hardware/Software Co-Validation
Emulation and Prototyping
Design from abstract specifications

Submissions

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The Program Committee invites authors to submit papers not to exceed 8 pages (10pt minimum font size, reasonable margins and line spacing) describing original and unpublished work. On the title page, please indicate: paper title, name and affiliations of all authors, and the topic category. Also identify a contact author and provide complete mailing address, phone number, fax number and an email address. Panel proposals are also invited. All submissions must be made electronically in PDF or Postscript format using the paper submission webpage: http://www.hldvt.com/submissions

Please ensure that your PDF or Postscript file is readable by Acrobat Reader or Ghostview. The submission of a paper or panel proposalwill be considered evidence that upon acceptance, the author(s) will present their paper or organize their panel at the workshop.

Submission deadline: June 20, 2008
Notification: August 13, 2008
Final manuscript: September 18, 2008

Additional information is available at http://www.hldvt.com/08. Questions regarding paper submissions and the program may be addressed to the program chair: Priyank Kalla, programchair@hldvt.com. Other questions may be addressed to the general chair: Prab Varma, generalchair@hldvt.com.

Committees

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Organizing Committee

General Chair
Prab Varma, Blue Pearl Software

Program Chair
Priyank Kalla, Univ. of Utah

Past Chair
Michael Hsiao, Virginia Tech

Finance Chair
Li-C Wang, UCSB

Publications Chair
Prabhat Mishra, Univ. of Florida

Web Publicity Chair
Ismet Bayraktaroglu, Sun

Publicity Chair
Sandeep Bhatia, Cadence

Industry Liaison
Bob Beckwith, LSI Logic

Local Arrangements Chair
Hussain Al-Assad, UC Davis

Program Committee

Mark Aagaard, Univ. of Waterloo
Samar Abdi, UC Irvine
Valeria Bertacco, Univ. of Michigan
Pankaj Chauhan, Calypto
Tim Cheng, UC Santa Barbara
Farzan Fallah, Fujitsu Labs of America
Franco Fummi, Univ. di Verona
Ian Harris, UC Irvine
John Hayes, Univ. of Michigan
Harry Hsieh, UC Riverside
Alan Hu, Univ. British Columbia
Robert Jones, Intel
Wolfgang Rosenstiel, T¨ubingen Univ.
Pablo Sanchez, Univ. of Cantabria
Sandeep Shukla, Virginia Tech
Lionel Torres, Univ. of Montpellier
Miroslav Velev, Aries Design Automation
Shireesh Verma, Marvell Tech
Jin Yang, Intel
Zeljko Zilic, McGill Univ.
Avi Ziv, IBM

Steering Committee

Bernard Courtois, CMP-TIMA
Sujit Dey, UC San Diego
Masahiro Fujita, Univ. of Tokyo
Prab Varma, Blue Pearl Softwar

For more information, visit us on the web at: http://www.hldvt.com/08

The IEEE International High-Level Design, Validation and Test Workshop (HLDVT2008 ) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC) and the IEEE Computer Society Design Automation Technical Committee.